Hardware Engineer (RTL/PD)

Job summary

As a Hardware Engineer specializing in RTL and Physical Design, you will optimize RTL through synthesis and backend processes to produce GDSII ready for tapeout. This role involves collaboration across teams to shape architecture and novel chip designs, rather than merely implementing them.

Qualifications

• Proven experience in writing synthesizable RTL in SystemVerilog.
• At least three successful tapeouts in your career.
• Familiarity with datapaths, pipelines, or custom logic with evolving microarchitectures.
• Strong debugging skills in simulation and formal methods.

Responsibilities

• Write and manage RTL across various blocks, including datapath logic and control interfaces.
• Collaborate with architecture teams to convert high-level specifications into microarchitectures.
• Partner with verification teams to review plans and assist in debugging.
• Execute the full backend design flow, including floorplanning and timing closure.
• Participate in design reviews and contribute to architectural decisions.
• Create tapeout checklists and support post-silicon characterization.

Skills

• Expertise in RTL design and physical design processes.
• Ability to work effectively with architects and verification teams.

Education

• Relevant degree in Electrical Engineering or related field preferred.

Tools

• Experience with EDA tools and AI-assisted design workflows is a plus.